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Process of assembling semiconductor device

Patent
US-10750621-B2
Inventor
INOUE SHINGO (JP)
Assignee
SEDI INC (JP)
Country
United States
Dates
  • Priority:
    2017/08/02
  • Grant:
    2020/08/18
Description
This web page summarizes information in PubChem about patent US-10750621-B2. This includes chemicals mentioned, as reported by PubChem contributors, as well as other content, such as title, abstract, and International Patent Classification (IPC) codes. To read more about how this page was constructed, please visit the PubChem patents help page.

1 Abstract

A process of assembling a semiconductor device is disclosed. The process includes steps of arraying metal bases on a carrier; applying sintered metal paste simultaneously onto the bases; disposing a substrate simultaneously onto the sintered metal paste where the substrate includes side walls corresponding to the bases and a wiring layer common the bases; and volatilizing solvent contained in the sintered metal paste.

2 Full Text

3 Important Dates

3.1 Priority Date

2017/08/02

3.2 Filing Date

2018/08/01

3.3 Publication Date

2020/08/18

3.4 Grant Date

2020/08/18

4 Inventor

INOUE SHINGO (JP)

5 Assignee

SEDI INC (JP)

6 Country

United States

7 Patent Family

8 Classification

8.1 IPC

H01L25/00 (inventive)

H05K3/34 (inventive)

H01L21/50 (inventive, first)

H01L23/00 (inventive)

8.2 CPC

H01L23/3736

H01L23/145

H01L23/13

H01L23/047 (inventive)

H01L21/50 (inventive, first)

H01L24/83 (inventive)

H01L25/50 (inventive)

H01L24/27 (inventive)

H05K3/3421 (inventive, first)

H01L2224/2732

H01L2924/17788

H01L2224/83855

9 Citations

10 Cited By

11 Similar Patents

12 Information Sources

  1. Google Patents
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